IEEE Std 2977:2021 pdf download.IEEE Standard for Adoption of MIPI Alliance Specification for A-PHY Interface (A-PHY) Version 1.0.
This A-PIIY Specification document specifies the implementation of the A-PHY, including its layering, electrical characteristics, and its optional features.
1.1.2 Out of Scope
Protocol Adaptation Layers (PALs)
A single A-PHY can serve multiple protocols at the same time, and each protocol has its own interface to the Data Link Layer, called a Protocol Adaptation Layer (PAL). PALs are not part of this document.
Specific Channel Configurations
Different protocols employing A-PHY technology can have different constraints, which can require the use of different approaches for operation control. Therefore, while this document provides the features to enable stable, optimized Link configuration, it does not mandate specific configurations for specific channels.
1.2 Purpose
Long reach devices, and specifically automotive devices, face increasing bandwidth demands for each of their functions, as well as an increase in the number of functions integrated into the system.
Addressing this demand requires wide bandwidth, low pin count (serial), highly power-efficient (network) interfaces with sufficient flexibility to be attractive for multiple applications, while employing just a single physical layer technology.
A-PHY complements M1P1 Alliance’s existing D-PHY and C-PHY interfaces by addressing the long reach automotive channel.
Port: An A-PHY Source or Sink with supporting PCB circuitry and interfacing connector.
Reverse Clock Mastership: Clock scheme in which the Sink acts as the Clock Master and the Source acts
as the Clock Slave.
Routing: Part of the Forwarding function that selects destination A-PHY Port for each A-Packet in a
Multi-Port A-PHY Device. See Section 11.5.!.
RX or Receiver: The Receive function of an A-PHY Port, e.g. Sink Port consists of Downlink RX and Uplink
TX.
Sink: The entity that implements one instance of an A-PItY Link and PIIY layers for a Downlink receiver
and an Uplink transmitter.
Source: The entity that implements one instance of an A-PHY Link and PHY layers for a Downlink
transmitter and an Uplink receiver.
TX or Transmitter: The transmit function of an A-PHY Port, e.g. Source Port consists of Downlink TX and
Uplink RX.
Uplink: Return part of the Low Throughput Bi-Directional Controls.
Upstream-A PPI: The traffic direction from the A-PitY Data Link Layer to the Adaptation Layer.
2.3 Abbreviations
A Ampere (Amp)
A-PHY MIPI Alliance A-PHY Interface (this specification)
C-PIIY MIPI Alliance C-P1IY interface
CSI-2 MIPI Alliance Camera Serial Interface
D-PHY MIPI Alliance D-PHY interface
DSI MIP1 Alliance Display Serial interface
DSI-2 MIPI Alliance Display Serial Interface
e.g. For example (Latin: exempli gratia)
F Farad (capacitance unit)
GHz Gigahertz
GND Ground
H Henry (induction unit)
i.e. That is (Latin: id est)
I2C NXP Inter Integrated Circuit interface
I3C MIPI Alliance I3C interface
MHz Megahertz
NAppClk Native Application Clock
PHY Physical Layer
RX Receive. Receiver
S Second (time unit)
TX Transmit, Transmitter
V Volt
W Watt.IEEE Std 2977 pdf download.