IEEE Std 802.3cm:2020(E) pdf download.IEEE Standard for Ethernet-Amendment 7:Physical Layer and Management Parameters for 400 Gb/s over Multimode Fiber.
1.3 Normative references
Insert the following two references in alphanumeric order:
ANSI/TIA-604-18-A:2018, FOCIS 18—Fiber Optic Connector Intermateability Standard—Type MPO-16.
IR 6 1754-7-2:2017, Fibre optic interconnecting devices and passive cornjxnents—Fihre optic connector interfaces—Part 7-2: Type MPO connector Iamily—Two fibre rows.
1.4 Definitions
Insert Iwo new definitions after 1.4.110 “400GBISE-SRI6” as follows:
1.4.l1Oa 400cBAsI:-sk4.2: IEEE 802.3 Physical Layer specification for 400 Gb/s using 400GBASE-R encoding over eight lanes on multimode fiber in a bidirectional WDM format, with reach up to at least 150 m. (See IEEE Std 802.3, Clause 150.)
1.4.11Ob 400GBASI:-sk8: IEEE 802.3 Physical Layer specification tbr 400 (lb/s using 400GBASE-R encoding over eight lanes of multimode fiber, with reach up to at least 100 m. (See IEEE Std 802.3, Clause 138.)
138.3 Delay and Skew
138.3.1 Delay constraints
Change 138.3. 1 as follows:
An upper hound to the delay through the PMA and PMD is required for predictable operation of the MAC Control PAUSI operation.
The sum of the transmit and receive delays at one end of the link contributed by the 5OGBASE-SR PMD including 2 m of fiber in one direction shall he no more than 1024 bit times (2 pause_quanta or 20.48 ns).
The sum of the transmit and receive delays at one end of the link contributed by the 1 OOGBASE-SR2 PMD including 2 m of fiber in one direction shall be no more than 2048 bit times (4 pause_quanta or 20.48 ns).
The sum of the transmit and receive delays at one end of the link contributed by the 200G1IASE-SR4 PMD including 2 m of fiber in one direction shall be no more than 4096 bit times (8 pause quanta or 20.48 ns).
The sum of the transmit and receive delays at one end of the link contributed by the 400GIIASE-SR8 PMD includin.g 2 in of fTherin onedirection shill be no mre than S192 bit times (16 pause_qinior 20,48 ns).
Descriptions of overall system delay constraints and the definitions for bit times and pause_quanta, can be found in 13i4 for 5OGHASE-SR, in 8O,4 for l00(1BASF-SR2, and in 116.4 and its references for 200GIIASE-SR4 and 400(JI3ASE-SR8.
138.3.2 Skew Constraints
Change the title of 138.3.2.2 as follows.IEEE Std 802.3cm pdf download.